{"id":182091,"date":"2021-02-18T18:40:01","date_gmt":"2021-02-18T15:40:01","guid":{"rendered":"https:\/\/en.buradabiliyorum.com\/samsung-announces-high-bandwidth-memory-processing-in-memory-architecture\/"},"modified":"2021-02-18T18:40:01","modified_gmt":"2021-02-18T15:40:01","slug":"samsung-announces-high-bandwidth-memory-processing-in-memory-architecture","status":"publish","type":"post","link":"https:\/\/buradabiliyorum.com\/en\/samsung-announces-high-bandwidth-memory-processing-in-memory-architecture\/","title":{"rendered":"#Samsung announces high bandwidth memory, processing-in-memory architecture"},"content":{"rendered":"

“#Samsung announces high bandwidth memory, processing-in-memory architecture<\/strong>”<\/p>\n

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\"Samsung
\n Credit: Samsung
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Samsung Electronics has announced on its News<\/a>room webpage the development of a new kind of memory chip architecture called high-bandwidth memory, processing-in-memory\u2014HBM-PIM. The architecture adds artificial intelligence processing to high-bandwidth memory chips. The new chips will be marketed as a way to speed up data centers, boost speed in high performance computers and to further enable AI app<\/a>lications.<\/p>\n

Computer engineers have long been working to remove the bottlenecks that arise in computers due to the need to shuffle data back and forth between a computer’s CPU and its memory chips. Most efforts to do so have involved adding small amounts of fast memory caches to the CPUs\u2014unfortunately, doing so increases energy consumption, leading to more heat production. In this new effort, the team at Samsung has taken the opposite approach\u2014giving memory chips the ability to take on some of the processing. With the new HBM-PIM, Samsung has placed what it describes as “a DRAM optimized AI engine inside of a memory bank.” This reduces the processing load on the CPU by offloading some of its work to remote databanks. Not only is the workload reduced, but the speed of processing is increased due to a reduction in data movement.<\/p>\n

Specs for the HBM-PIM include a PCU running at 300MHz controlled by the host CPU using conventional memory commands. With this approach, the PCU can be instructed to carry out FP16 calculations directly inside of the DRAM unit. Notably, the HBM-PIM can operate as normal RAM when a system is running applications that have not been written for it.<\/p>\n

Samsung notes that when they tested the new technology<\/a> with their existing HBM2 Aquabolt systems, system performance doubled and energy consumption was reduced by 70%. They also noted that installing HBM-PIMs in existing systems would not require any other changes to in-place hardware or software. Their HBM-PIM technology is currently being tested with previously developed AI accelerators created by AI solution partners\u2014they expect to see the results in the first half of this year. <\/p>\n

Representatives of the company will be presenting a paper they have written describing the new technology at this year’s International Solid-State Circuits Virtual Conference.\n <\/p>\n\n

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Samsung brings cutting-edge ultraviolet light technology to DRAM production\n <\/p><\/div>\n

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\n More information:<\/strong>
\n news.samsung.com\/global\/samsun \u2026 -ai-processing-power<\/a><\/p><\/div>\n

\n \u00a9 2021 Science<\/a> X Network<\/p>\n

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Citation<\/strong>:
\n Samsung announces high bandwidth memory, processing-in-memory architecture (2021, February 18)
\n retrieved 18 February 2021
\n from https:\/\/techxplore.com\/news\/2021-02-samsung-high-bandwidth-memory-processing-in-memory.html<\/p>\n

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